CC1021-RTR1 datasheet(45/91 Pages) TI1

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CHP _ CURRENT / 4

CHP

[ A]

ref

PLL _ BW

174

16 log

7.126

ref

min

80.75

220

[ ]

ref

839

6 pF

[ ]

ref

21823

[ ]

ref

80.75

[ ]

ref

7126

[ ]

ref

3037

7 pF

VCO

ref

FREQ

0.5

DITHER

8192

Not Recommended for New Designs NRND

CC1021

www.ti.com

SWRS045D – JANUARY 2006 – REVISED JANUARY 2015

(24)

The VCO frequency is divided by 2 and by 4 to generate frequencies in the two bands, respectively.

The VCO sensitivity (sometimes referred to as VCO gain) varies over frequency and operating conditions.

Typically the VCO sensitivity varies between 12 and 36 MHz/V. For calculations the geometrical mean at

21 MHz/V can be used. The PLL calibration (explained below) measures the actual VCO sensitivity and

adjusts the charge pump current accordingly to achieve correct PLL loop gain and bandwidth (higher

charge pump current when VCO sensitivity is lower).

Equation 25 through Equation 29 can be used for calculating PLL loop filter component values, see

Figure 6-1, for a desired PLL loop bandwidth, BW.

(25)

(26)

(27)

(28)

(29)

Define a minimum PLL loop bandwidth as shown in Equation 30.

(30)

If BWmin > Baud rate/3 then set BW = BWmin and if BWmin < Baud rate/3 then set BW = Baud rate/3 in

Equation 25 through Equation 29.

There is one special case when using the recommended 14.7456 MHz crystal:

If the data rate is 4.8 kBaud or below the following loop filter components are recommended:

C6 = 100 nF

C7 = 3900 pF

C8 = 1000 pF

R2 = 2.2 k

R3 = 6.8 k

After calibration, the PLL bandwidth is set by the PLL_BW register in combination with the external loop

filter components calculated above. The PLL_BW can be found from Equation 31.

(31)

Where:

fref is the reference frequency (in MHz).

The PLL loop filter bandwidth increases with increasing PLL_BW setting.

After calibration, the applied charge pump current (CHP_CURRENT[3:0]) can be read in the STATUS1

(32)

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