CC1021-RTR1 datasheet(47/91 Pages) TI1

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End of calibration

Wait for T≥100 us

Calibrate RX frequency register A

(to calibrate TX frequency register

B write MAIN register = D1h).

Write MAIN register = 11h:

RXTX=0, F_REG=0, PD_MODE=1,

FS_PD=0, CORE_PD=0, BIAS_PD=0,

RESET_N=1

Write FREQ_A, FREQ_B, VCO,

CLOCK_A and CLOCK_B registers.

PLL_BW = 174 + 16log

2(fref/7.126)

Start single calibration

Write CALIBRATE register = B4h

Start calibration

ref is the reference frequency (in

MHz)

Yes

Read STATUS register and wait until

LOCK_CONTINUOUS=1

Read STATUS register and wait until

CAL_COMPLETE=1

Calibration OK?

End of calibration

Wait for T≥100 us

Calibrate RX frequency register A

(to calibrate TX frequency register

B write MAIN register = D1h).

Write MAIN register = 11h:

RXTX=0, F_REG=0, PD_MODE=1,

FS_PD=0, CORE_PD=0, BIAS_PD=0,

RESET_N=1

Write FREQ_A, FREQ_B, VCO,

CLOCK_A and CLOCK_B registers.

PLL_BW = 174 + 16log

2(fref/7.126)

Start single calibration

Write CALIBRATE register = B4h

Start calibration

ref is the reference frequency (in

MHz)

Yes

Read STATUS register and wait until

LOCK_CONTINUOUS=1

Read STATUS register and wait until

CAL_COMPLETE=1

Calibration OK?

Not Recommended for New Designs NRND

CC1021

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SWRS045D – JANUARY 2006 – REVISED JANUARY 2015

Figure 5-26. Single Calibration Algorithm for RX and TX

5.12.3 PLL Turn-on Time versus Loop Filter Bandwidth

If calibration has been performed the PLL turn-on time is the time needed for the PLL to lock to the

desired frequency when going from power down mode (with the crystal oscillator running) to TX or RX

mode. The PLL turn-on time depends on the PLL loop filter bandwidth. Table 5-12 gives the PLL turn-on

time for different PLL loop filter bandwidths.

Detailed Description

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