CC1021-RTR1 datasheet(33/91 Pages) TI1

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Not Recommended for New Designs NRND

CC1021

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SWRS045D – JANUARY 2006 – REVISED JANUARY 2015

Figure 5-14. Typical Blocker Rejection. Carrier Frequency Set to

Figure 5-13. Typical Blocker Rejection. Carrier Frequency Set to

434.3072 MHz (102.4 kHz Channel Filter Bandwidth, 38.4 kBaud)

434.3072 MHz (102.4 kHz Channel Filter Bandwidth, 19.2 kBaud)

Figure 5-16. Typical Blocker Rejection. Carrier Frequency Set to

Figure 5-15. Typical Blocker Rejection. Carrier Frequency Set to

868.3072 MHz (102.4 kHz Channel Filter Bandwidth, 38.4 kBaud)

868.3072 MHz (102.4 kHz Channel Filter Bandwidth, 19.2 kBaud)

5.9.8

Linear IF Chain and AGC Settings

CC1021 is based on a linear IF chain where the signal amplification is done in an analog VGA (Variable

Gain Amplifier). The gain is controlled by the digital part of the IF chain after the ADC (Analog to Digital

Converter). The AGC (Automatic Gain Control) loop ensures that the ADC operates inside its dynamic

range by using an analog/digital feedback loop.

The maximum VGA gain is programmed by the VGA_SETTING[4:0] in the VGA3 register. The VGA gain

is programmed in approximately 3 dB/LSB. The VGA gain should be set so that the amplified thermal

noise from the front-end balance the quantization noise from the ADC. Therefore the optimum maximum

VGA gain setting will depend on the channel filter bandwidth.

A digital RSSI is used to measure the signal strength after the ADC. The CS_LEVEL[4:0] in the VGA4

Further explanation can be found in Figure 5-17.

The VGA gain will be changed according to a threshold set by the VGA_DOWN[2:0] in the VGA3 register

and the VGA_UP[2:0] in the VGA4 register. Together, these two values specify the signal strength limits

used by the AGC to adjust the VGA gain.

Detailed Description

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CC1021-RTR1 Datasheet(PDF) 33 Page - Texas Instruments