CC1021-RTR1 datasheet(51/91 Pages) TI1

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Turn on crystal oscillator core

MAIN: PD_MODE=1, FS_PD=1, XOSC_PD=0, BIAS_PD=1

Wait 1.2 ms*

Power Down mode

*Time to wait depends

on the crystal frequency

and the load capacitance

Wait until lock detected from LOCK pin

or STATUS register

Turn on RX: MAIN: PD_MODE = 0

Wait until lock detected from LOCK pin

or STATUS register

Turn on TX: MAIN: PD_MODE = 0

Set PA_POWER

RX mode

TX mode

Turn off RX/TX:

MAIN: PD_MODE = 1, FS_PD=1,

XOSC_PD=1, BIAS_PD=1

PA_POWER=00h

Power Down mode

Turn on frequency synthesizer

MAIN: RXTX=0, F_REG=0, FS_PD=0

Turn on frequency synthesizer

MAIN: RXTX=1, F_REG=1, FS_PD=0

RX or TX?

Turn on bias generator. MAIN: BIAS_PD=0

Wait 150 us

Turn on crystal oscillator core

MAIN: PD_MODE=1, FS_PD=1, XOSC_PD=0, BIAS_PD=1

Wait 1.2 ms*

Power Down mode

*Time to wait depends

on the crystal frequency

and the load capacitance

Wait until lock detected from LOCK pin

or STATUS register

Turn on RX: MAIN: PD_MODE = 0

Wait until lock detected from LOCK pin

or STATUS register

Turn on TX: MAIN: PD_MODE = 0

Set PA_POWER

Wait until lock detected from LOCK pin

or STATUS register

Turn on RX: MAIN: PD_MODE = 0

Wait until lock detected from LOCK pin

or STATUS register

Turn on TX: MAIN: PD_MODE = 0

Set PA_POWER

RX mode

TX mode

RX mode

TX mode

Turn off RX/TX:

MAIN: PD_MODE = 1, FS_PD=1,

XOSC_PD=1, BIAS_PD=1

PA_POWER=00h

Power Down mode

Turn on frequency synthesizer

MAIN: RXTX=0, F_REG=0, FS_PD=0

Turn on frequency synthesizer

MAIN: RXTX=1, F_REG=1, FS_PD=0

Turn on frequency synthesizer

MAIN: RXTX=0, F_REG=0, FS_PD=0

Turn on frequency synthesizer

MAIN: RXTX=1, F_REG=1, FS_PD=0

RX or TX?

Turn on bias generator. MAIN: BIAS_PD=0

Wait 150 us

Not Recommended for New Designs NRND

CC1021

www.ti.com

SWRS045D – JANUARY 2006 – REVISED JANUARY 2015

Figure 5-28. Sequence for Activating RX or TX Mode

5.15 On-Off Keying (OOK)

The data modulator can also provide OOK (On-Off Keying) modulation. OOK is an ASK (Amplitude Shift

Keying) modulation using 100% modulation depth. OOK modulation is enabled in RX and in TX by setting

TXDEV_M[3:0] = 0000 in the DEVIATION register. An OOK eye diagram is shown in Figure 5-29.

The data demodulator can also perform OOK demodulation. The demodulation is done by comparing the

signal level with the "carrier sense" level (programmed as CS_LEVEL in the VGA4 register). The signal is

then decimated and filtered in the data filter. Data decision and bit synchronization are as for FSK

reception.

In this mode AGC_AVG in the VGA2 register must be set to 3. The channel bandwidth must be 4 times

the Baud rate for data rates up to 9.6 kBaud. For the highest data rates the channel bandwidth must be 2

times the Baud rate (see Table 5-14). Manchester coding must always be used for OOK.

NOTE

The automatic frequency control (AFC) cannot be used when receiving OOK, as it requires a

frequency shift.

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