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RZ/T1 Datasheet(PDF) 94 Page - Renesas Technology Corp |
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RZ/T1 Datasheet(HTML) 94 Page - Renesas Technology Corp |
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94 / 139 page ![]() R01DS0228EJ0200 Rev.2.00 Page 94 of 139 Jun. 30, 2025 RZ/T1 Group 2. Electrical Characteristics 2.4.4 DMAC Timing Note 1. tPBcyc: PCLKB cycle Table 2.18 DMAC Timing Output load conditions: VOH = VCCQ33 × 0.5, VOL1 = VCCQ33 × 0.5, C = 30 pF Item Symbol min*1 max Unit Test Conditions DMAC DREQ pulse width tDRQW tPBcyc × 2 ― ns Figure 2.37 DACK and TEND delay time tDACD 0 10 ns Figure 2.38 Figure 2.37 DREQ Input Timing Figure 2.38 DACK and TEND Output Timing DREQ0 to DREQ2 tDRQW DACK0 to DACK2 TEND0 to TEND2 tDACD CKIO tDACD |
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