AMD-K6-2ESLASH400AMZ datasheet(38/332 Pages) AMD

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Internal Architecture

Chapter 2

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

Figure 6. Register X and Y Functional Units

The branch condition unit is separate from the branch

prediction logic in that it resolves conditional branches such as

JCC and LOOP after the branch condition has been evaluated.

2.6

Branch-Prediction Logic

Sophisticated branch logic that can minimize or hide the impact

of changes in program flow is designed into the AMD-K6-2E

processor. Branches in x86 code fit into two categories:

Unconditional branches always change program flow (that is,

the branches are always taken)

Conditional branches may or may not divert program flow

(that is, the branches are taken or not-taken). When a

conditional branch is not taken, the processor simply

continues decoding and executing the next instructions in

memory.

MMX/

3DNow!

Multiplier

Integer X

ALU

MMX

ALU

MMX

Shifter

3DNow!

ALU

MMX

ALU

Integer Y

ALU

Scheduler

Buffer

(24 RISC86® Operations)

Issue Bus

for the

Execution

Pipeline

Issue Bus

for the

Execution

Pipeline

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