AMD-K6-2ESLASH400AMZ datasheet(74/332 Pages) AMD

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Software Environment

Chapter 3

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

3.7

Instructions Supported by the AMD-K6™-2E Processor

This section documents all of the x86 instructions supported by

the AMD-K6™-2E processor. Tables 12 through 15 define the

integer, floating-point, MMX, and 3DNow! instructions for the

AMD-K6-2E processor, respectively.

Each table shows the instruction mnemonic, opcode, modR/M

by te, dec o de typ e , and R I SC 86 op erat ion( s) fo r each

instruction.

Instruction

Mnemonic and

Operand Types

The first column in each table indicates the instruction

mnemonic and operand types, with the following notations:

disp16/32—16-bit or 32-bit displacement value

disp32/48—doubleword or 48-bit displacement value

disp8—8-bit displacement value

eXX—register width depending on the operand size

imm16/32—16-bit or 32-bit immediate value

imm8—8-bit immediate value

mem16/32—word or doubleword integer value in memory

mem32/48—doubleword or 48-bit integer value in memory

mem32real—32-bit floating-point value in memory

mem48—48-bit integer value in memory

mem64—64-bit value in memory

mem64real—64-bit floating-point value in memory

mem8—byte integer value in memory

mem80real—80-bit floating-point value in memory

mmreg—MMX/3DNow! register

mmreg1—MMX/3DNow! register defined by bits 5, 4, and 3

of the modR/M byte

mmreg2—MMX/3DNow! register defined by bits 2, 1, and 0

of the modR/M byte

mreg16/32—word or doubleword integer register, or word or

doubleword integer value in memory defined by the

modR/M byte

mreg8—byte integer register or byte integer value in

memory defined by the modR/M byte

reg8—byte integer register defined by instruction byte(s) or

bits 5, 4, and 3 of the modR/M byte

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