AMD-K6-2ESLASH400AMZ datasheet(8/332 Pages) AMD

8 / 332 page

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Contents

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

14.2

Absolute Ratings..................................................................... 255

14.3

DC Characteristics .................................................................. 256

14.4

Power Dissipation ................................................................... 258

14.5

Power Derating Based on Lower CPU Frequencies ............ 260

14.6

Power and Grounding............................................................. 262

14.7

I/O Buffer Characteristics ...................................................... 264

Signal Switching Characteristics ............................................ 267

15.1

CLK Switching Characteristics.............................................. 267

15.2

Clock Switching Characteristics

for 100-MHz Bus Operation.................................................... 268

15.3

Clock Switching Characteristics

for 66-MHz Bus Operation...................................................... 268

15.4

Valid Delay, Float, Setup, and Hold Timings ...................... 269

15.5

Output Delay Timings for 100-MHz Bus Operation............. 270

15.6

Input Setup and Hold Timings

for 100-MHz Bus Operation.................................................... 272

15.7

Output Delay Timings for 66-MHz Bus Operation............... 274

15.8

Input Setup and Hold Timings

for 66-MHz Bus Operation...................................................... 276

15.9

RESET and Test Signal Timing ............................................. 278

15.10 Timing Diagrams..................................................................... 281

Thermal Design ........................................................................ 285

16.1

Package Thermal Specifications ........................................... 285

16.2

Measuring Case Temperature ............................................... 288

16.3

Sample Heatsink Measured Data.......................................... 289

16.4

Layout and Airflow Considerations ...................................... 295

Pin Designation Diagrams ....................................................... 299

17.1

Pin Designations by Functional Grouping ........................... 301

Package Specifications ............................................................ 303

18.1

321-Pin Staggered CPGA Package Specification................. 303

Ordering Information .............................................................. 305

Index........................................................................................... 307

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