MP2884A datasheet(24/107 Pages) MPS

24 / 107 page

MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID

MP2884A Rev. 1.01

www.MonolithicPower.com

12/25/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

threshold for a period of time referred to as the

OCP blanking time. OCP_Total can be

programmed to no action, hiccup, retry six

times, and latch-off mode via the PMBus.

The controller does not take action in no action

mode and keeps the PWMs switching. The fault

indication bit in register STATUS_IOUT (7Bh)

and STATUS_WORD (79h) is not set in no

action mode.

In hiccup mode, the controller forces the PWM

signals into tri-state to disable the output. The

controller attempts to restart after 12.5ms of

protection delay time.

In retry six times mode, the VR hiccups six

times at most. If the fault is removed within the

six restarts, the VR resumes normal operation.

If the fault remains after the six restarts, the VR

shuts down until a new power cycle, an EN

toggle, or a PMBus COMMAND ON occurs.

In latch mode, the VR shuts down until a new

power cycle, an EN toggle, or a PMBus

COMMAND on occurs.

These four protection types are also available

for VOUT UVP and VOUT OVP2.

The second OCP type, OCP_Phase, is a

current-based

limitation

threshold.

The

MP2884A monitors the phase current cycle-by-

cycle. When the phase current exceeds the

OCP_Phase threshold at the PWM off time, the

PWM remains low to discharge the inductor

current. If the load current continues rising, the

output voltage drops because the inductor

current is limited. OCP_Phase is implemented

with VOUT UVP, generally. The OCP_Phase

threshold is PMBus-programmable with register

MFR_OCP_PHASE (EDh).

Under-Voltage Protection (UVP)

The MP2884A monitors the VDIFF voltage to

provide UVP and uses a dual UVP approach.

The first UVP type, UVP1, is a digital UVP.

UVP1 is triggered when the internal ADC

senses that the VDIFF voltage is lower than the

threshold for a pre-set blanking time. The UVP1

threshold can be set from 0 - 480mV with 32mV

resolution.

Refer

the

MFR_SYS_CONFIG (44h) section on page 54.

The second UVP type, UVP2, is triggered when

the VDIFF voltage is lower than the threshold

for a pre-set blanking time. The register

OVUV_LEVEL (2Ch) can program the UVP2

threshold to VREF - 430mV, VREF - 310mV or

VREF - 190mV. Refer to the MFR_OVUV_SEL

(2Ch) section on page 44. When programming

the gain of the differential voltage sense

amplifier as half, the UVP2 threshold is doubled.

For example, set the register to a -430mV level

to achieve the VREF - 860mV threshold.

The UVP scheme is the same as the

OCP_Total protection scheme. When the

VDIFF voltage is lower than the UVP threshold

for a given amount of time (UVP blanking time),

the controller forces the PWM signals into tri-

state to disable the output. The register

MFR_OVP_UVP_SET (EEh) sets the UVP

mode and blanking time. Like the OCP_Total

protection scheme, the UVP scheme also

provides no action, hiccup, retry six times, and

latch-off options.

Over-Voltage Protection (OVP)

The MP2884A monitors the VDIFF voltage to

provide OVP and uses a dual OVP approach

(described below). When OVP is triggered, the

MP2884A pulls all activated PWMs low to turn

on the low-side MOSFET to discharge the

output capacitors until VOUT reaches +300mV.

Then all PWMs are set to Hi-Z.

The first OVP type, OVP1, is triggered when the

VDIFF voltage is higher than the OVP1

threshold without any delay time. The OVP1

fault is in latch-off mode.

The OVP1 threshold is VOUT_MAX (24h)

+400mV, regardless of the gain of the

differential voltage sense amplifier.

The second OVP type, OVP2, is triggered when

the VDIFF voltage above the OVP2 threshold

for a pre-set blanking time. Just like in UVP, the

MP2884A provides no action, hiccup, retry six

times, and latch-off modes for the OVP2 fault.

The register MFR_OVUV_LEVEL (2Ch) can

program the OVP2 level to VREF + 430mV, VREF

+ 310mV, and VREF + 190mV. Refer to the

MFR_OVUV_SEL (2Ch) section on page 44.

When programming the gain of the differential

voltage sense amplifier as half, the OVP2

threshold is doubled. For example, set the

MP2884A Datasheet(PDF) 24 Page - Monolithic Power Systems

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