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MP2884A Datasheet(PDF) 71 Page - Monolithic Power Systems |
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MP2884A Datasheet(HTML) 71 Page - Monolithic Power Systems |
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71 / 107 page  MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID MP2884A Rev. 1.01 www.MonolithicPower.com 71 12/25/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Bits Bit Name Description 15:8 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 7:0 RESERVED Unused. X indicates that writes are ignored and reads are always 0. MFR_APS_FS_LIMIT4 (A6h) This register sets the interval time threshold between the consecutive phases' PWM rising edges to detect a fast load increase. When APS is enabled and the system sheds phases, once the interval time is lower than this threshold, the system exits phase shedding and runs with a full-phase for a configurable amount of time. Command MFR_APS_FS_LIMIT4 Format Unsigned binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function x x Bits Bit Name Description 15:8 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 7:0 RESERVED Unused. X indicates that writes are ignored and reads are always 0. MFR_APS_FS_CTRL1 (A7h) This register sets the interval time threshold for phase 1's PWM to detect a fast load increase. When APS is enabled and the system sheds phases, once the controller detects that the PWM interval is lower than this threshold, the system exits phase shedding and runs with a full-phase for a configurable amount of time. This register also sets the enable bit for the exit-phase-shedding strategy via PWM frequency detection. Command MFR_APS_FS_CTRL1 Format Unsigned binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function x x x Bits Bit Name Description 15:13 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 12 FS_EXIT_APS_EN1 Enable bit of exit-phase-shedding according to phase 1’s PWM interval time. 0: disable 1: enable The controller detects phase 1’s PWM interval time from the end of MIN_OFF_TIME. 11 FS_EXIT_APS_EN2 Enable bit of exit-phase-shedding according to the PWM interval time between consecutive phases. 0: disable 1: enable The controller detects the consecutive phases' PWM interval time from the end of PHASE_BLANK_TIME. |
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