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MP2884A Datasheet(PDF) 47 Page - Monolithic Power Systems |
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MP2884A Datasheet(HTML) 47 Page - Monolithic Power Systems |
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47 / 107 page  MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID MP2884A Rev. 1.01 www.MonolithicPower.com 47 12/25/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Bits Bit Name Description 15:14 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 13:11 T_ALT_DELAY Trigger delay time for pulling TALERT# low. 100µs/LSB. 10 TSNS_CURRENT_DIS Enable bit for sourcing a 10µA constant current from TSNS to the thermistor to generate a voltage for the temperature sensing. 0: enable 1: disable 9 TSNS_T_ALT_EN Enable bit for pulling TALERT# low when the controller detects an over- temperature warning from TSNS. 0: disable 1: enable 8 TEMP_T_ALT_EN Enable bit for pulling TALERT# low when the controller detects an over- temperature warning from VTEMP. 0: disable 1: enable 7:0 TSNS_T_ALT_THRE Digital threshold of the over-temperature warning from TSNS. TSNS_T_ALT_THRE = Rt x 10µA x 256 / 1.6V VIN_ON (35h) This register sets the input voltage UVLO rising threshold. When the input voltage rises higher than VIN_ON, the MP2884A soft starts to the boot voltage with a programmed slew rate. Command VIN_ON Format Linear, two’s complement binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function Exponent x Mantissa Bits Bit Name Description 15:11 Exponent This value is two’s complement binary format and fixed to 11101. Exponent = -3 (fixed) 10:8 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 7:0 Mantissa Input voltage UVLO rising threshold. 0.125V/LSB. VIN_ON = Mantissa x 2exponent = Mantissa x 0.125 VIN_OFF (36h) This register sets the input voltage UVLO falling threshold. When the input voltage falls below VIN_OFF, all PWMs enter tri-state mode, and the VR shuts down. Command VIN_OFF Format Linear, two’s complement binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function Exponent x Mantissa |
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