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MP2884A Datasheet(PDF) 49 Page - Monolithic Power Systems |
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MP2884A Datasheet(HTML) 49 Page - Monolithic Power Systems |
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49 / 107 page ![]() MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID MP2884A Rev. 1.01 www.MonolithicPower.com 49 12/25/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 6:0 Mantissa exp onent IOUT _ CAL _ OFFSET Mantissa 2 Mantissa 0.25 0.25A/LSB (TOTAL_CURRENT_RESOLUTION = 0) 0.5A/LSB (TOTAL_CURRENT_RESOLUTION = 1) This value is in two’s complement binary format. Bit[6] is the sign bit. MFR_PROTECT_DIS (3Ah) This register is used for protection selection. Command MFR_PROTECT_DIS Format Unsigned binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function x x x x x OVP1_DIS OTP _DIS Bits Bit Name Description 15:11 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 10 PWM_CHK_FAULT_EN Enable bit for ADC sampling of the Intelli-Phase PWM once a protection occurs. In this process, all PWM outputs remain in Hi-Z status. 0: disable 1: enable 9 CS_FAULT_EN Enable bit for CSx fault protection from CS. Voltage on any CS pin falling below 0.3V can trigger CSx fault protection and latch the controller. 0: disable 1: enable 8 TEMP_FAULT_EN Enable bit for VTEMP fault protection from VTEMP. Voltage on VTEMP exceeding a certain threshold can trigger VTEMP fault protection and latch the controller. 0: disable 1: enable 7 TEMP_FAULT_BLOCK_ OTP Enable bit for blocking OTP when a VTEMP fault protection is triggered. 0: enable 1: disable 6 DVID_BLOCK_OVP1 Enable bit for blocking the output voltage OVP1 during DVID. 0: disable 1: enable 5:4 VIN_PROTECT_DIS Enable bits for the input voltage UVLO and OVP. 11: disable others: enable 3:2 OVP1_DIS Enable bits for the output voltage OVP1. 01: disable others: enable 1:0 OTP_DIS Enable bits for OTP from VTEMP. 01: disable others: enable |
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