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MP2884A Datasheet(PDF) 57 Page - Monolithic Power Systems |
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MP2884A Datasheet(HTML) 57 Page - Monolithic Power Systems |
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57 / 107 page  MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID MP2884A Rev. 1.01 www.MonolithicPower.com 57 12/25/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. MFR_CS_OFFSET2 (4Dh) This register sets the phase-current offset for the current balance loop. Command MFR_CS_OFFSET2 Format Signed binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function x x x x Bits Bit Name Description 15 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 14:10 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 9:5 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 4:0 RESERVED Unused. X indicates that writes are ignored and reads are always 0. Calculate the phase-current offset with Equation (16): CS_OS_PHASEn = 512 x IOFFSET x KCS x RCS / 1600 (16) Where RCS is the phase current sense resistor (in kΩ), and KCS is the current sense gain of the DrMOS (in µA/A). MFR_CS_OFFSET3 (4Eh) This register sets the phase-current offset for the current balance loop. Command MFR_CS_OFFSET3 Format Signed binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function x x x x Bits Bit Name Description 15 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 14:10 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 9:5 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 4:0 RESERVED Unused. X indicates that writes are ignored and reads are always 0. Calculate the phase-current offset with Equation (17): CS_OS_PHASEn = 512 x IOFFSET x KCS x RCS / 1600 (17) Where RCS is the phase current sense resistor (in kΩ), and KCS is the current sense gain of the DrMOS (in µA/A). OT_WARN_LIMIT (51h) This register sets the over-temperature warning threshold via VTEMP. Command OT_WARN_LIMIT Format Unsigned binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function x x x x x x x x OT_WARN_LIMIT |
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