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MP2884A Datasheet(PDF) 77 Page - Monolithic Power Systems |
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MP2884A Datasheet(HTML) 77 Page - Monolithic Power Systems |
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77 / 107 page ![]() MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID MP2884A Rev. 1.01 www.MonolithicPower.com 77 12/25/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 6:2 FILT2_CHECK_TIME Check time of the synchronizing function of the second-stage PWM-VID filter to improve output voltage accuracy after DVID. 100µs/LSB. The second-stage PWM-VID filter uses an internal hysteresis module to avoid jitter on its output. When the output remains unchanged for this checking time, the hysteresis module synchronizes its output with the input to eliminate small DC errors. 1:0 SECOND_FIL_AVE Averaging window of the second-stage PWM-VID filter. 00: average of 512 points 01: average of 1024 points 10: average of 2048 points 11: average of 4056 points MFR_PWMVID_FLTR_CTRL2 (B2h) This register sets the performance of the digital PWM-VID filters. Command MFR_PWMVID_FLTR_CTRL2 Format Unsigned binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function Bits Bit Name Description 15 DVID_TRIG_MODE DVID trigger mode selector. 0: according to the relationship between the calculated VID_TARGET and current VO_REF 1: according to whether the real-time counted PWM-VID on-time changes more than the threshold set in bit[5:3] or bit[2:0] 14 FILT2_SYNC_EN Enable bit for the synchronizing function of the second stage PWM-VID filter to improve output voltage accuracy after DVID. 0: disable 1: enable The second stage PWM-VID filter uses an internal hysteresis module to avoid jitter on its output. When the output remains unchanged for this checking time, the hysteresis module synchronizes its output with the input to eliminate small DC errors. 13:10 DVID_DOWN_THRE DVID direction identification threshold for downward DVID. When the current VO_REF is greater than VID_TARGET + DVID_DOWN_THRE, the controller considers the DVID to be downward. 9:6 DVID_UP_THRE DVID direction identification threshold for upward DVID. When the current VO_REF is less than VID_TARGET - DVID_UP_THRE, the controller considers the DVID to be upward. 5:3 TON_CHANGE_THRE_ N Threshold for the downward DVID starting indicator (DVID_TRIG_MODE = 1). When VOUT is settled, the controller uses the output of the second stage filter as VO_REF. When the detected on-time negative variation of PWM-VID is greater than TON_CHANGE_THRE_N, the controller enters downward DVID, and VO_REF switches to the first- stage filter output. 5ns/LSB. 2:0 TON_CHANGE_THRE_ P Threshold for the upward DVID starting indicator (DVID_TRIG_MODE = 1). When VOUT is settled, the controller uses the output of the second-stage filter as VO_REF. When the detected on-time positive variation of PWM-VID is greater than TON_CHANGE_THRE_P, the controller enters upward DVID, and VO_REF switches to the first-stage filter output. 5ns/LSB. |
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