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MP2884A Datasheet(PDF) 76 Page - Monolithic Power Systems |
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MP2884A Datasheet(HTML) 76 Page - Monolithic Power Systems |
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76 / 107 page  MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID MP2884A Rev. 1.01 www.MonolithicPower.com 76 12/25/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. MFR_PWMVID_MAX_DUTY (B0h) This register sets the PWM-VID on-time threshold used to indicate 100% PWM-VID duty. Command MFR_PWMVID_MAX_DUTY Format Unsigned binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function x x x x x x PWMVID_MAX_DUTY Bits Bit Name Description 15:10 RESERVED Unused. X indicates that writes are ignored and reads are always 0. 9:1 PWMVID_MAX_DUTY PWM-VID on-time threshold to indicate 100% PWM-VID duty. When the detected PWM-VID on time is greater than this threshold, the controller considers the current PWM-VID duty to be 100%. 10ns/LSB. 0 PWMVID_HIGHLOW_ DET_EN Enable bit for PWM-VID constant high/low detection. 0: disable 1: enable MFR_PWMVID_FLTR_CTRL1 (B1h) This register sets the performance of the digital PWM-VID filters. Command MFR_PWMVID_FLTR_CTRL1 Format Unsigned binary Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w Function Bits Bit Name Description 15:13 DVID_DOWN_START_ THRE Threshold for the downward DVID starting indicator (DVID_TRIG_MODE = 0). When VOUT is settled, the controller uses the output of the second-stage filter as VO_REF. When the calculated VID_TARGET is less than the current VO_REF - DVID_DOWN_START_THRE, the controller enters the downward DVID, and VO_REF switches to the first-stage filter output. DVID_DOWN_START_THRE must be greater than DVID_DOWN_END_THRE. 12:10 DVID_UP_START_ THRE Threshold for the upward DVID starting indicator (DVID_TRIG_MODE = 0). When VOUT is settled, the controller uses the output of the second-stage filter as VO_REF. When the calculated VID_TARGET is greater than the current VO_REF + DVID_UP_START_THRE, the controller enters the upward DVID, and VO_REF switches to the output of the first-stage filter. DVID_UP_START_THRE must be greater than DVID_UP_END_THRE. 9:7 DVID_DOWN_END_ THRE Threshold for the downward DVID ending indicator. During the downward DVID, the controller uses the output of the first-stage filter as VO_REF. When the current VO_REF is less than the calculated VID_TARGET + DVID_DOWN_END_THRE, this bit switches to the output of the second-stage filter. DVID_DOWN_START_THRE must be greater than DVID_DOWN_END_THRE. |
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