MP2884A datasheet(45/107 Pages) MPS

45 / 107 page

MP2884A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID

MP2884A Rev. 1.01

www.MonolithicPower.com

12/25/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Bits

Bit Name

Description

FREQ_ADD_PHASE_

MODE

Mode selector for adding phases due to the PWM frequency increasing. When

the controller runs in auto-phase shedding mode, it enters full-phase CCM if it

detects that the PWM frequency has risen higher than the setting limit due to the

load increasing.

0: idle PWMs switch from Hi-Z to low

1: idle PWMs switch from Hi-Z to high

UV_ADD_PHASE_

MODE

Mode selector for adding phases due to VFB dropping. When the controller runs

in auto-phase-shedding mode, it enters full-phase CCM if it detects that VFB has

dropped below VO_REF - 25mV due to the load increasing.

0: idle PWMs switch from Hi-Z to low

1: idle PWMs switch from Hi-Z to high

13:7

PWM_PRD_ERROR_

THRE

PWM period error threshold for holding the DC loop and current balance loop.

When the actual PWM period has a deviation from the configured period, either

the positive or negative deviation exceeds this threshold. The DC loop and

current balance loop are held. 80ns/LSB.

PRD_HOLD_DC_EN

Enable bit for holding the DC loop for a certain amount of time when the error of

the PWM period exceeds the threshold PWM_PRD_ERROR_THRE.

0: disable

1: enable

This function needs another condition. See MFR_PWM_LIMIT (3Fh) bit[10:7].

PHASE_CNT_

HOLD_DC_EN

Enable bit for holding the DC loop for a certain amount of time when the phase-

count changes.

0: disable

1: enable

VFB_HOLD_DC_EN

Enable bit for holding the DC loop for a certain amount of time when VFB

exceeds the VO_REF - 25mV or VO_REF + 20mV threshold.

0: disable

1: enable

3:0

DC_LOOP_HOLD_TIME

DC loop holding time. 100µs/LSB.

MFR_CB_LOOP_CTRL (31h)

This register sets the current balance (CB) loop performance.

Command

MFR_CB_LOOP_CTRL

Format

Unsigned binary

Bit

Access

r/w

Function

CB_LOOP_HOLD_TIME

Bits

Bit Name

Description

VFB_HOLD_CB_EN

Enable bit for holding the CB loop for a certain amount of time when VFB

exceeds the VO_REF - 25mV or VO_REF + 20mV threshold.

0: disable

1: enable

PRD_HOLD_CB_EN

Enable bit for holding the CB loop for a certain amount of time when the error of

the PWM period exceeds the threshold PWM_PRD_ERROR_THRE.

0: disable

1: enable

MP2884A Datasheet(PDF) 45 Page - Monolithic Power Systems

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