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AMD-K6-2E/400AMZ Datasheet(PDF) 167 Page - Advanced Micro Devices |
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AMD-K6-2E/400AMZ Datasheet(HTML) 167 Page - Advanced Micro Devices |
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167 / 332 page ![]() Chapter 6 Bus Cycles 149 22529B/0—January 2000 AMD-K6™-2E Processor Data Sheet Preliminary Information HOLD on every clock edge but does not assert HLDA until any in-progress cycle or sequence of locked cycles is completed. When the processor samples HOLD negated during a hold acknowledge cycle, it negates HLDA off the next clock edge. The processor regains control of the bus and can assert ADS# off the same clock edge on which HLDA is negated. Figure 58. Basic HOLD/HLDA Operation CLK A[31:3] BE[7:0]# ADS# M/IO# D/C# W/R# D[63:0] HOLD HLDA BRDY# |
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