Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Mexican  ▼
ALLDATASHEET.COM.MX

X  

AMD-K6-2E/400AMZ Datasheet(PDF) 184 Page - Advanced Micro Devices

No. de pieza AMD-K6-2E/400AMZ
Descripción Electrónicos  AMD-K6??2E Embedded Processor
PDF  332 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-K6-2E/400AMZ Datasheet(HTML) 184 Page - Advanced Micro Devices

Back Button AMD-K6-2E/400AMZ Datasheet HTML 180Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 181Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 182Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 183Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 184Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 185Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 186Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 187Page - Advanced Micro Devices AMD-K6-2E/400AMZ Datasheet HTML 188Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 184 / 332 page
background image
166
Bus Cycles
Chapter 6
AMD-K6™-2E Processor Data Sheet
22529B/0—January 2000
Preliminary Information
Locked Operation
with BOFF#
Intervention
Figure 67 on page 167 shows BOFF# asserted within a locked
read-write pair of bus cycles. In this example, the processor
asserts LOCK# with ADS# to drive a locked memory read cycle
followed by a locked memory write cycle. During the locked
memory write cycle in this example, the processor samples
BOFF# asserted. The processor immediately aborts the locked
memory write cycle and floats all its bus-driving signals,
including LOCK#. The system logic or another bus master can
initiate an inquire cycle or drive a new bus cycle one clock edge
after the clock edge on which BOFF# is sampled asserted. If the
system logic drives a BOFF#-initiated inquire cycle and hits a
modified line, the processor performs a writeback cycle before
it restarts the locked cycle (the processor asserts LOCK# during
the writeback cycle).
In Figure 67, the processor immediately restarts the aborted
locked write cycle by driving the bus off the clock edge on
which BOFF# is sampled negated. The system logic must ensure
the processor results for interrupted and uninterrupted locked
cycles are consistent. That is, the system logic must guarantee
the memory accessed by the processor is not modified during
the time another bus master controls the bus.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com