RZSLASHT2L datasheet(68/103 Pages) RENESAS

No. de pieza	RZ/T2L

Descripción Electrónicos	RZ Arm-based High-end 32 & 64-bit MPUs

PDF	103 Pages

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Fabricante Electrónico	RENESAS [Renesas Technology Corp]

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Corresponding bit in

the SPOER register

MTU PWM output pins

Outputs disabled

tPOEDS

Figure 2.45

Output disable time for POE in response to the register setting

MTU PWM output pins

Oscillation stop detection

signal (internal signal)

Main clock

Outputs disabled

tPOEDOS

Figure 2.46

Output disable time for POE in response to the oscillation stop detection

2.5.5.5

GPT Timing

Table 2.29

GPT timing

Parameter

Symbol

Min.

Max.

Unit*1

Reference figure

GPT

Input capture input

pulse width

Single-edge setting

tGTICW

2.5

—

tPHcyc

Figure 2.47

Both-edge setting

3.5

—

External trigger

input pulse width

Single-edge setting

tGTEW

2.5

—

tPHcyc

Figure 2.48

Both-edge setting

3.5

—

Note 1. tPHcyc: PCLKH cycle (LLPP channels), PCLKM cycle (Other channels)

PCLKH, PCLKM

tGTICW

Input capture input

Figure 2.47

GPT input capture input timing

RZ/T2L Datasheet

2. Electrical Characteristics

R01DS0409EJ0130 Rev.1.30

Feb 27, 2026

Page 68 of 103

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