RZSLASHT2L datasheet(96/103 Pages) RENESAS

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2.7

A/D Conversion Characteristics

Table 2.45

12-Bit A/D conversion characteristics

Parameter

Min.

Typ.

Max.

Unit

Reference

figure

Resolution

bits

—

Analog input capacitance

—

Channel-dedicated sample-and-

hold circuits in use

(AN000 to AN002, AN100 to

AN102)

Conversion time*1

Permissible signal source

impedance

Max. = 1.0 kΩ

1.52

—

µs

—

Offset error

—

±13

LSB

—

Full-scale error

—

±13

LSB

—

Quantization error

—

±0.5

—

LSB

—

Absolute accuracy

—

±14

LSB

—

DNL differential non-linearity error

—

±3

LSB

—

INL integral non-linearity error

—

±4

LSB

—

Holding characteristics of sample-

and-hold circuits

—

2.67

µs

—

Dynamic range

0.15

—

VREFH0 -

0.15

—

Channel-dedicated sample-and-

hold circuits not in use

(AN000 to AN003, AN100 to

AN103)

Conversion time*1

Permissible signal source

impedance

Max. = 1.0 kΩ

0.84

—

µs

—

Offset error

—

±11

LSB

—

Full-scale error

—

±11

LSB

—

Quantization error

—

±0.5

—

LSB

—

Absolute accuracy

—

±12

LSB

—

DNL differential non-linearity error

—

±3

LSB

—

INL integral non-linearity error

—

±4

LSB

—

Note:

The specified values in the table apply when there is no access to the external bus during A/D conversion. If access proceeds

during A/D conversion, values may not fall within the specified ranges.

Note 1. The conversion time is the total of the sampling time and the comparison time.

RZ/T2L Datasheet

2. Electrical Characteristics

R01DS0409EJ0130 Rev.1.30

Feb 27, 2026

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