RZSLASHT2L datasheet(21/103 Pages) RENESAS

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Table 1.18

List of pins and pin functions (196-pin FBGA) (4 of 8)

number

I/O power

domain

Power supply

clock system

control

I/O

port

Bus,

DMAC

Timer (MTU3,

POE3, GPT /

POEG, CMTW,

RTC)

Communication (SCI,

IIC, GMAC, ESC,

USB, CANFD, SPI,

xSPI)

DSMIF,

Mailbox

Interrupt

ADC12

Host

interface

(SHOST)

Encoder I/F

—

VREFH1

—

D10

—

VREFH0

—

D11

—

VSS

—

D12

—

P18_2 BS

MTIOC4B /

MTIOC4D /

GTIOC2B /

GTIOC3B

SCK0 / IIC_SDA2 /

GMAC_PTPOUT3 /

XSPI1_CS0#

—

D13

—

P18_3 CKE

MTIOC4B /

MTIOC4D /

GTIOC2B /

GTIOC3B /

CMTW1_TIC1

DE3 / ETH2_CRS /

CANRXDP1 /

XSPI1_IO4

—

IRQ0

—

D14

—

P18_1 WE1# /

DQMLU

MTIOC3D /

GTIOC1B

SS3# / CTS3# /

RTS3#

—

IRQ10

ADTRG1#

—

TDI

P02_5 WE1# /

DQMLU

—

SCK5 / SPI_SSL31

—

P02_2 A16

MTIOC2A /

POE10# /

GTIOC10A /

RTCAT1HZ

TXD1 / SDA1 /

MOSI1 / CANTX0 /

SPI_MOSI3

—

IRQ14

—

ENCIFDI0

—

TDO

P02_4 WE0# /

DQMLL

—

DE1 / SPI_SSL33

—

VCC1833_2

—

P01_4 WE1# /

DQMLU

POE0#

ETH2_TXD1

—

IRQ3

—

DUEI0 /

HDSL0_LINK

VCC1833_2

—

P00_0 D15

—

SCK2 / DE2 /

ETH2_RXD3

—

DUEI1 /

HDSL0_SEL1

—

VCC1833_2

—

VDD

—

VDD

—

VCC18_ADC1

—

E10

—

VCC18_ADC0

—

E11

—

VSS

—

E12

—

TRACECLK

P17_4 DACK

MTIOC3C /

GTIOC0A /

GTETRGB

CTS3# /

ETH2_TXER /

ESC_PHYLINK2 /

SPI_SSL32 /

SPI_RSPCK0 /

XSPI1_IO3

—

HDSL1_CLK2

E13

—

P17_7 RD# /

DACK

MTIOC4A /

MTIOC4C /

GTIOC2A /

GTIOC3A

RXD3 / SCL3 /

MISO3 / XSPI1_CKP

—

E14

—

P18_0 WE0# /

DQMLL

MTIOC4A /

MTIOC4C /

GTIOC2A /

GTIOC3A

TXD3 / SDA3 /

MOSI3 / XSPI1_IO0

—

P04_1 CKIO

—

TXD3 / SDA3 /

MOSI3 / IIC_SDA2 /

SPI_MOSI0

—

TCK

P02_7 —

—

TXD5 / SDA5 / MOSI

—

TMS

P02_6 —

—

RXD5 / SCL5 / MISO5

—

TRST#

—

VCC33

—

VDD

—

VSS

—

VSS

—

VDD

—

F10

—

VCC33

—

F11

—

MDD

P17_0 —

—

SS0# / CTS0# /

RTS0# / ESC_IRQ /

SPI_SSL01 /

XSPI1_IO1

—

HDSL1_MISO2

RZ/T2L Datasheet

1. Overview

R01DS0409EJ0130 Rev.1.30

Feb 27, 2026

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