RZSLASHT2L datasheet(8/103 Pages) RENESAS

8 / 103 page

Table 1.10

Hardware accelerator for industrial interfaces

Feature

Functional description

ΔΣ interface (DSMIF)

● 3 channels × 2 units

● Selectable 2 inputs (U/V) or 3 inputs (U/V/W)

● Up to 6 ΔΣ modulators are externally connectable

● Sinc filter can be selected as first, second or third order

● Direct error connection to POE3 and POEG

● Enhancement of current error detection

Trigonometric function unit (TFU)

Calculation of sine, cosine, arctangent, hypot_k (

x2+y2/k)

● Simultaneous calculation of sine and cosine

● Simultaneous calculation of arctangent and hypot_k

Encoder interfaces

● EnDat 2.2 (2 units)

● BiSS-C (2 units)

● A-format (2 units)

● HIPERFACE DSL (2 units)

● ENCOUT (1 unit)

Table 1.11

Safety

Feature

Functional description

Memory protection unit (MPU)

● Cortex-R52 MPU

Two stages MPUs (EL2 and EL1)

24 regions each MPU

● Master MPU

Memory protection for masters except Cortex-R52 (DMAC, USB, Ethernet MAC, CoreSight,

SHOSTIF)

Protects important registers from being overwritten for in case a program runs out of control.

CRC calculator (CRC)

● 2 channels

● CRC code generation for arbitrary amounts of data in 8-, 16-, or 32-bit units

● Select any of four generating polynomials:

– X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 + X4 + X2 + X + 1

(32-Ethernet)

– X32 + X28 + X27 + X26 + X25 + X23 + X22 + X20 + X19 + X18 + X14 + X13 + X11 + X10 +

X9 + X8 + X6 + 1 (CRC-32C)

– X16 + X15 + X2 + 1 (CRC-16)

– X16 + X12 + X5 + 1 (CRC-CCITT)

– X8 + X2 + X + 1 (CRC-8)

Clock monitor circuit (CLMA)

● Monitors the abnormal output clock frequency from the input clock (main clock oscillator),

PLL circuit, or low-speed on-chip oscillator.

● Input clock oscillation stop detection: Available

Data operation circuit (DOC)

The function to compare, add, or subtract 16-bit data

Isolated peripherals

● Safety dedicated peripherals are available:

– GPT: 4 ch

– SCI: 1 ch

– IIC: 1 ch

– SPI: 1 ch

– CRC: 1 unit

– RTC: 1 unit

– GPIO: Sharable with normal GPIO

– On-chip system SRAM with ECC

● They are mapped independently from normal peripherals so that access protection can be

done by EL2 MPU.

RZ/T2L Datasheet

1. Overview

R01DS0409EJ0130 Rev.1.30

Feb 27, 2026

Page 8 of 103

RZ/T2L Datasheet(PDF) 8 Page - Renesas Technology Corp

RZ/T2L Datasheet(HTML) 8 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL