AMD-K6-2ESLASH400AMZ datasheet(142/332 Pages) AMD

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Signal Descriptions

Chapter 5

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

5.46

TCK (Test Clock)

Pin Attribute

Input, Internal Pullup

Pin Location

M-34

Summary

TCK is the clock for boundary-scan testing using the Test

Access Port (TAP). See “Boundary-Scan Test Access Port

(TAP)” on page 229 for details regarding the operation of the

TAP controller.

Sampled

The processor always samples TCK, except while TRST# is

asserted.

5.47

TDI (Test Data Input)

Pin Attribute

Input, Internal Pullup

Pin Location

N-35

Summary

TDI i s t h e se ri a l test data an d i n str u cti o n i npu t fo r

boundary-scan testing using the Test Access Port (TAP). See

“Boundary-Scan Test Access Port (TAP)” on page 229 for details

regarding the operation of the TAP controller.

Sampled

The processor samples TDI on every rising TCK edge, but only

while in the Shift-IR and Shift-DR states.

5.48

TDO (Test Data Output)

Pin Attribute

Output

Pin Location

N-33

Summary

TDO is the se rial test data and instruction out put fo r

boundary-scan testing using the Test Access Port (TAP). See

“Boundary-Scan Test Access Port (TAP)” on page 229 for details

regarding the operation of the TAP controller.

Driven and Floated

The processor drives TDO on every falling TCK edge, but only

while in the Shift-IR and Shift-DR states. TDO is floated at all

other times.

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