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AMD-K6-2E/400AMZ Datasheet(PDF) 242 Page - Advanced Micro Devices

No. de pieza AMD-K6-2E/400AMZ
Descripción Electrónicos  AMD-K6??2E Embedded Processor
PDF  332 Pages
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Fabricante Electrónico  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-K6-2E/400AMZ Datasheet(HTML) 242 Page - Advanced Micro Devices

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224
System Management Mode (SMM)
Chapter 11
AMD-K6™-2E Processor Data Sheet
22529B/0—January 2000
Preliminary Information
Table 43 shows the format of the I/O trap doubleword.
The I/O trap doubleword is related to the I/O trap restart slot
(see “I/O Trap Restart Slot” on page 224). If bit 1 of the I/O
trap doubleword is set by the processor, it means that SMI#
was asserted during the execution of an I/O instruction. The
SMI handler tests bit 1 to see if there is a valid I/O instruction
trapped. If the I/O instruction is valid, the SMI handler is
required to ensure the I/O trap restart slot is set properly. The
I/O trap restart slot informs the CPU whether it should
re-execute the I/O instruction after the RSM or execute the
instruction following the trapped I/O instruction.
Note: If SMI# is sampled asserted during an I/O bus cycle a mini-
mum of three clock edges before BRDY# is sampled asserted,
the associated I/O instruction is guaranteed to be trapped by
the SMI handler.
11.7
I/O Trap Restart Slot
The I/O trap restart slot at offset FF00h in the SMM state-save
area specifies whether the trapped I/O instruction should be
re-executed on return from SMM. This slot in the state-save area
is called the I/O instruction restart function. Re-executing a
trapped I/O instruction is useful, for example, if an I/O write
occurs to a disk that is powered down. The system logic
monitoring such an access can assert SMI#. Then the SMM
service routine would query the system logic, detect a failed I/O
write, take action to power-up the I/O device, enable the I/O
trap restart slot feature, and return from SMM.
The fields of the I/O trap restart slot are defined as follows:
s
Bits 31–16—Reserved
s
Bits 15–0—I/O instruction restart on return from SMM:
0000h
= execute the next instruction after the trapped
I/O instruction
00FFh = re-execute the trapped I/O instruction
Table 43. I/O Trap Doubleword Configuration
31—16
15—4
3
2
1
0
I/O Port
Address
Reserved
REP String
Operation
I/O String
Operation
Valid I/O
Instruction
Input or
Output



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