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AMD-K6-2E/400AMZ Datasheet(PDF) 107 Page - Advanced Micro Devices |
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AMD-K6-2E/400AMZ Datasheet(HTML) 107 Page - Advanced Micro Devices |
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107 / 332 page ![]() Chapter 5 Signal Descriptions 89 22529B/0—January 2000 AMD-K6™-2E Processor Data Sheet Preliminary Information 5.6 AHOLD (Address Hold) Pin Attribute Input Pin Location V-04 Summary AHOLD can be asserted by the system to initiate one or more inquire cycles. To allow the system to drive the address bus during an inquire cycle, the processor floats A[31:3] and AP off the clock edge on which AHOLD is sampled asserted. The data bus and all other control and status signals remain under the control of the processor and are not floated. This allows a bus cycle that is in progress when AHOLD is sampled asserted to continue to completion. The processor resumes driving the address bus off the clock edge on which AHOLD is sampled negated. If AHOLD is sampled asserted, ADS# is only asserted in order to perform a writeback cycle due to an inquire cycle that hits a modified cache line. Sampled The processor samples AHOLD on every clock edge. AHOLD is recognized while INIT and RESET are sampled asserted. |
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