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AMD-K6-2E/400AMZ Datasheet(PDF) 109 Page - Advanced Micro Devices |
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AMD-K6-2E/400AMZ Datasheet(HTML) 109 Page - Advanced Micro Devices |
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109 / 332 page ![]() Chapter 5 Signal Descriptions 91 22529B/0—January 2000 AMD-K6™-2E Processor Data Sheet Preliminary Information 5.8 APCHK# (Address Parity Check) Pin Attribute Output Pin Location AE-05 Summary If the processor detects an address parity error during an inquire cycle, APCHK# is asserted for one clock. The processor does not take an internal exception as the result of detecting an address bus parity check, and system logic must respond appropriately to the assertion of this signal. The processor is designed so that APCHK # does not glitch, enabling the signal to be used as a clocking source for system logic. Driven APCHK# is driven valid off the clock edge after the clock edge on which the processor samples EADS # asserted. It is negated off the next clock edge. APCHK# is always driven except in the three-state test mode. |
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